Lesson KB 08: Setting CPU Frequency of PSoC 5LP in PSoC Creator

EagleSoC and EagleSoC mini boards have two external clock sources: One 24MHz XTAL oscillator and one 32.768KHz crystal on the board. These two external clock sources provide the system with a stable frequency input.

CY8CKIT-059 Prototyping Kit can solder a 32.768kHz crystal on P15.2 and P15.3.

There are two methods to set up the CPU frequency of PSoC 5LP to 67MHz/80MHz in PSoC Creator: PLL and External Osc.

1. PLL + Internal Low-Frequency Sources

In the first method, we can use PLL to generate less than 80MHz frequency to CPU from internal low-frequency sources like IMO or Digital Signal. Use the following procedure to set the CPU speed of PSoC 5LP to maximum ( < 80MHz) (or any other desired frequency).

1. Open the .cydwr file in the project.
2. In the Clocks tab, click on the Edit Clock button.
3. In the PLL box, select IMO as the clock source and set the desired frequency to 79MHz.
4. In the Master Clock box, select PLL_OUT as the source and set a divider of 1.
5. Similarly, set the divider to 1 in the Bus Clock box.

The screenshot below shows the clock configuration.

The accuracy of PLL output will depend on the accuracy of these low-frequency sources. If the low-frequency sources have an accuracy of +/- 0.1%, then the PLL output will also have the same accuracy. Therefore, if set PLL frequency to 80MHz, the +/- 0.1% of 80MHz will correspond to 79.2 to 80.8 MHz, which may slightly exceed the allowable CPU frequency. This is why we get the following error message when setting PLL Output to 80 MHz.

Therefore, the maximum allowed PLL Output frequency in PSoC 5LP is 79MHz. The suitable frequency for PSoC5LP is 72 MHz.

2. PLL + External XTAL Sources

Alternatively, we can use an external XTAL clock source to generate the 67MHz or 80MHz to the CPU.

1. Open the .cydwr file in the project.
2. In the Clocks tab, click on the Edit Clock button.
3. Enable the XTAL box and configure the clock frequency to 24.000 MHz.
4. In the IMO box, select XTAL as the clock source.
5. In the PLL box, select XTAL as the clock input and set the desired frequency to 80 MHz.
6. In the Master Clock box, select PLL_OUT as the source and set a divider of 1.
7. Similarly, set the divider to 1 in the Bus Clock box.