Page 15 - EE2449_TTL_Datasheet
P. 15
SN54/74LS74A
GUARANTEED OPERATING RANGES
Symbol Parameter Min Typ Max Unit
V CC Supply Voltage 54 4.5 5.0 5.5 V
74 4.75 5.0 5.25
T A Operating Ambient Temperature Range 54 –55 25 125 °C
74 0 25 70
I OH Output Current — High 54, 74 –0.4 mA
I OL Output Current — Low 54 4.0 mA
74 8.0
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol Parameter Min Typ Max Unit Test Conditions
Guaranteed Input HIGH Voltage for
V IH Input HIGH Voltage 2.0 V
All Inputs
54 0.7 Guaranteed Input LOW Voltage for
g
V Inp u t LOW V oltage V V
Input LOW Voltage
V IL IL
74 0.8 All Inputs
V IK Input Clamp Diode Voltage –0.65 –1.5 V V CC = MIN, I IN = –18 mA
54 2.5 3.5 V V CC = MIN, I OH = MAX, V IN = V IH IH
IN
CC
OH
Output HIGH Voltage
V O u tp u t HIGH V oltage
V OHOH
74 2.7 3.5 V or V IL per Truth Table
54, 74 0.25 0.4 V I OL = 4.0 mA V CC = V CC MIN,
u
LOW
V
tp
u
t
oltage
O
V Output LOW Voltage V
V IN =V IL or V IHIN = V IL or V IH
V OLOL
74 0.35 0.5 V I OL = 8.0 mA per Truth Table
Input High Current
Data, Clock 20 mA V CC = MAX, V IN = 2.7 V
Set, Clear 40
IH
I IH
Data, Clock 0.1
Set, Clear 0.2 mA V CC = MAX, V IN = 7.0 V
Input LOW Current
I IL Data, Clock –0.4 mA V CC = MAX, V IN = 0.4 V
Set, Clear –0.8
I OS Output Short Circuit Current (Note 1) –20 –100 mA V CC = MAX
I CC Power Supply Current 8.0 mA V CC = MAX
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS (T A = 25°C, V CC = 5.0 V)
Limits
Symbol Parameter Min Typ Max Unit Test Conditions
f MAX Maximum Clock Frequency 25 33 MHz Figure 1
V V CC = 5.0 V
5 0 V
13 25 ns
PLH
t PLH C L = 15
C L = 15 pF F
Clock , Clear , Set to O u tp u t Figure 1 1
Clock Clear Set to Output
u
re
Fig
t PHL 25 40 ns
AC SETUP REQUIREMENTS (T A = 25°C)
Limits
Symbol Parameter Min Typ Max Unit Test Conditions
t W(H) Clock 25 ns Figure 1
t W(L) Clear, Set 25 ns Figure 2
Data Setup Time — HIGH 20 ns V CC = 5.0 V
Fig
u
re
t t s Figure 1 1
Data Setup Time — LOW 20 ns
t h Hold Time 5.0 ns Figure 1
FAST AND LS TTL DATA
5-72
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